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avxintrin_emu.h
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1 /*
2  Copyright (c) 2010, Intel Corporation. All rights reserved.
3 
4  Redistribution and use in source and binary forms, with or without
5  modification, are permitted provided that the following conditions are met:
6 
7  * Redistributions of source code must retain the above copyright notice, this
8  list of conditions and the following disclaimer.
9  * Redistributions in binary form must reproduce the above copyright notice,
10  this list of conditions and the following disclaimer in the documentation
11  and/or other materials provided with the distribution.
12  * Neither the name of Intel Corporation nor the names of its contributors may
13  be used to endorse or promote products derived from this software without
14  specific prior written permission.
15 
16  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26  THE POSSIBILITY OF SUCH DAMAGE.
27 */
28 
29 /***
30 
31  Provide feedback to: maxim.locktyukhin intel com, phil.j.kerly intel com
32 
33  Version 1.0 - Initial release.
34 
35  This AVX intrinsics emulation header file designed to work with Intel C/C++
36  as well as GCC compilers.
37 
38  Known Issues and limitations:
39 
40  - does not support immediate values higher than 0x7 for _mm[256]_cmp_[ps|pd]
41  intrinsics, UD2 instruction will be generated instead
42 
43  - -O0 optimization level may _sometimes_ result with compile time errors due
44  to failed forced inline and compiler not being able to generate instruction
45  with constant immediate operand becasue of it, compiling with -O1 and/or
46  -finline-functions should help.
47 
48 ***/
49 
50 
51 #ifndef __EMU_M256_AVXIMMINTRIN_EMU_H__
52 #define __EMU_M256_AVXIMMINTRIN_EMU_H__
53 
54 #ifdef __GNUC__
55 
56 #ifdef __SSE__
57 #include <xmmintrin.h>
58 #endif
59 
60 #ifdef __SSE2__
61 #include <emmintrin.h>
62 #endif
63 
64 #ifdef __SSE3__
65 #include <pmmintrin.h>
66 #endif
67 
68 #ifdef __SSSE3__
69 #include <tmmintrin.h>
70 #endif
71 
72 #if defined (__SSE4_2__) || defined (__SSE4_1__)
73 #include <smmintrin.h>
74 #endif
75 
76 #if defined (__AES__) || defined (__PCLMUL__)
77 #include <wmmintrin.h>
78 #endif
79 
80 #else
81 
82 #include <wmmintrin.h>
83 
84 #endif
85 
86 #pragma message (" --- Intel remark: AVX intrinsics are emulated with SSE ---")
87 
88 /*
89  * Intel(R) AVX compiler intrinsics.
90  */
91 
92 #ifdef __cplusplus
93 extern "C" {
94 #endif
95 
96 /*
97  * This is an emulation of Intel AVX
98  */
99 
100 #if defined( _MSC_VER ) || defined( __INTEL_COMPILER )
101  #define __EMU_M256_ALIGN( a ) __declspec(align(a))
102  #define __emu_inline __forceinline
103  #define __emu_int64_t __int64
104 #elif defined( __GNUC__ )
105  #define __EMU_M256_ALIGN( a ) __attribute__((__aligned__(a)))
106  #define __emu_inline __inline __attribute__((__always_inline__))
107  #define __emu_int64_t long long
108 #else
109  #error "unsupported platform"
110 #endif
111 
112 typedef union __EMU_M256_ALIGN(32) __emu__m256
113 {
114  float __emu_arr[8];
115  __m128 __emu_m128[2];
116 } __emu__m256;
117 
118 typedef union __EMU_M256_ALIGN(32) __emu__m256d
119 {
120  double __emu_arr[4];
121  __m128d __emu_m128[2];
122 } __emu__m256d;
123 
124 typedef union __EMU_M256_ALIGN(32) __emu__m256i
125 {
126  int __emu_arr[8];
127  __m128i __emu_m128[2];
128 } __emu__m256i;
129 
130 static __emu_inline __emu__m256 __emu_set_m128( const __m128 arr[] ) { __emu__m256 ret; ret.__emu_m128[0] = arr[0]; ret.__emu_m128[1] = arr[1]; return (ret); }
131 static __emu_inline __emu__m256d __emu_set_m128d( const __m128d arr[] ) { __emu__m256d ret; ret.__emu_m128[0] = arr[0]; ret.__emu_m128[1] = arr[1]; return (ret); }
132 static __emu_inline __emu__m256i __emu_set_m128i( const __m128i arr[] ) { __emu__m256i ret; ret.__emu_m128[0] = arr[0]; ret.__emu_m128[1] = arr[1]; return (ret); }
133 
134 
135 #define __EMU_M256_IMPL_M1( type, func ) \
136 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1 ) \
137 { __emu##type res; \
138  res.__emu_m128[0] = _mm_##func( m256_param1.__emu_m128[0] ); \
139  res.__emu_m128[1] = _mm_##func( m256_param1.__emu_m128[1] ); \
140  return ( res ); \
141 }
142 
143 #define __EMU_M256_IMPL_M1_RET( ret_type, type, func ) \
144 static __emu_inline __emu##ret_type __emu_mm256_##func( __emu##type m256_param1 ) \
145 { __emu##ret_type res; \
146  res.__emu_m128[0] = _mm_##func( m256_param1.__emu_m128[0] ); \
147  res.__emu_m128[1] = _mm_##func( m256_param1.__emu_m128[1] ); \
148  return ( res ); \
149 }
150 
151 #define __EMU_M256_IMPL_M1_RET_NAME( ret_type, type, func, name ) \
152  static __emu_inline __emu##ret_type __emu_mm256_##name( __emu##type m256_param1 ) \
153 { __emu##ret_type res; \
154  res.__emu_m128[0] = _mm_##func( m256_param1.__emu_m128[0] ); \
155  res.__emu_m128[1] = _mm_##func( m256_param1.__emu_m128[1] ); \
156  return ( res ); \
157 }
158 
159 #define __EMU_M256_IMPL_M1_LH( type, type_128, func ) \
160 static __emu_inline __emu##type __emu_mm256_##func( type_128 m128_param ) \
161 { __emu##type res; \
162  res.__emu_m128[0] = _mm_##func( m128_param ); \
163  __m128 m128_param_high = _mm_movehl_ps( *(__m128*)&m128_param, *(__m128*)&m128_param ); \
164  res.__emu_m128[1] = _mm_##func( *(type_128*)&m128_param_high ); \
165  return ( res ); \
166 }
167 
168 #define __EMU_M256_IMPL_M1_HL( type_128, type, func ) \
169 static __emu_inline type_128 __emu_mm256_##func( __emu##type m256_param1 ) \
170 { type_128 res, tmp; \
171  res = _mm_##func( m256_param1.__emu_m128[0] ); \
172  tmp = _mm_##func( m256_param1.__emu_m128[1] ); \
173  *(((__emu_int64_t*)&res)+1) = *(__emu_int64_t*)&tmp; \
174  return ( res ); \
175 }
176 
177 #define __EMU_M256_IMPL_M1P_DUP( type, type_param, func ) \
178 static __emu_inline __emu##type __emu_mm256_##func( type_param param ) \
179 { __emu##type res; \
180  res.__emu_m128[0] = _mm_##func( param ); \
181  res.__emu_m128[1] = _mm_##func( param ); \
182  return ( res ); \
183 }
184 
185 #define __EMU_M256_IMPL_M1I_DUP( type, func ) \
186  static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, const int param2 ) \
187 { __emu##type res; \
188  res.__emu_m128[0] = _mm_##func( m256_param1.__emu_m128[0], param2 ); \
189  res.__emu_m128[1] = _mm_##func( m256_param1.__emu_m128[1], param2 ); \
190  return ( res ); \
191 }
192 
193 #define __EMU_M256_IMPL2_M1I_DUP( type, func ) \
194 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, const int param2 ) \
195 { __emu##type res; \
196  res.__emu_m128[0] = __emu_mm_##func( m256_param1.__emu_m128[0], param2 ); \
197  res.__emu_m128[1] = __emu_mm_##func( m256_param1.__emu_m128[1], param2 ); \
198  return ( res ); \
199 }
200 
201 #define __EMU_M256_IMPL2_M1I_SHIFT( type, func, shift_for_hi ) \
202 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, const int param2 ) \
203 { __emu##type res; \
204  res.__emu_m128[0] = __emu_mm_##func( m256_param1.__emu_m128[0], param2 & ((1<<shift_for_hi)-1) ); \
205  res.__emu_m128[1] = __emu_mm_##func( m256_param1.__emu_m128[1], param2 >> shift_for_hi); \
206  return ( res ); \
207 }
208 
209 #define __EMU_M256_IMPL_M2( type, func ) \
210 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, __emu##type m256_param2 ) \
211 { __emu##type res; \
212  res.__emu_m128[0] = _mm_##func( m256_param1.__emu_m128[0], m256_param2.__emu_m128[0] ); \
213  res.__emu_m128[1] = _mm_##func( m256_param1.__emu_m128[1], m256_param2.__emu_m128[1] ); \
214  return ( res ); \
215 }
216 
217 #define __EMU_M256_IMPL2_M2T( type, type_2, func ) \
218 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, __emu##type_2 m256_param2 ) \
219 { __emu##type res; \
220  res.__emu_m128[0] = __emu_mm_##func( m256_param1.__emu_m128[0], m256_param2.__emu_m128[0] ); \
221  res.__emu_m128[1] = __emu_mm_##func( m256_param1.__emu_m128[1], m256_param2.__emu_m128[1] ); \
222  return ( res ); \
223 }
224 
225 #define __EMU_M256_IMPL_M2I_DUP( type, func ) \
226 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, __emu##type m256_param2, const int param3 ) \
227 { __emu##type res; \
228  res.__emu_m128[0] = _mm_##func( m256_param1.__emu_m128[0], m256_param2.__emu_m128[0], param3 ); \
229  res.__emu_m128[1] = _mm_##func( m256_param1.__emu_m128[1], m256_param2.__emu_m128[1], param3 ); \
230  return ( res ); \
231 }
232 
233 #define __EMU_M256_IMPL2_M2I_DUP( type, func ) \
234 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, __emu##type m256_param2, const int param3 ) \
235 { __emu##type res; \
236  res.__emu_m128[0] = __emu_mm_##func( m256_param1.__emu_m128[0], m256_param2.__emu_m128[0], param3 ); \
237  res.__emu_m128[1] = __emu_mm_##func( m256_param1.__emu_m128[1], m256_param2.__emu_m128[1], param3 ); \
238  return ( res ); \
239 }
240 
241 #define __EMU_M256_IMPL_M2I_SHIFT( type, func, shift_for_hi ) \
242 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, __emu##type m256_param2, const int param3 ) \
243 { __emu##type res; \
244  res.__emu_m128[0] = _mm_##func( m256_param1.__emu_m128[0], m256_param2.__emu_m128[0], param3 & ((1<<shift_for_hi)-1) ); \
245  res.__emu_m128[1] = _mm_##func( m256_param1.__emu_m128[1], m256_param2.__emu_m128[1], param3 >> shift_for_hi ); \
246  return ( res ); \
247 }
248 
249 #define __EMU_M256_IMPL_M3( type, func ) \
250 static __emu_inline __emu##type __emu_mm256_##func( __emu##type m256_param1, __emu##type m256_param2, __emu##type m256_param3 ) \
251 { __emu##type res; \
252  res.__emu_m128[0] = _mm_##func( m256_param1.__emu_m128[0], m256_param2.__emu_m128[0], m256_param3.__emu_m128[0] ); \
253  res.__emu_m128[1] = _mm_##func( m256_param1.__emu_m128[1], m256_param2.__emu_m128[1], m256_param3.__emu_m128[1] ); \
254  return ( res ); \
255 }
256 
257 
258 /*
259  * Compare predicates for scalar and packed compare intrinsics
260  */
261 #define _CMP_EQ_OQ 0x00 /* Equal (ordered, nonsignaling) */
262 #define _CMP_LT_OS 0x01 /* Less-than (ordered, signaling) */
263 #define _CMP_LE_OS 0x02 /* Less-than-or-equal (ordered, signaling) */
264 #define _CMP_UNORD_Q 0x03 /* Unordered (nonsignaling) */
265 #define _CMP_NEQ_UQ 0x04 /* Not-equal (unordered, nonsignaling) */
266 #define _CMP_NLT_US 0x05 /* Not-less-than (unordered, signaling) */
267 #define _CMP_NLE_US 0x06 /* Not-less-than-or-equal (unordered, signaling) */
268 #define _CMP_ORD_Q 0x07 /* Ordered (nonsignaling) */
269 
270 #define _CMP_EQ_UQ 0x08 /* Equal (unordered, non-signaling) */
271 #define _CMP_NGE_US 0x09 /* Not-greater-than-or-equal (unordered, signaling) */
272 #define _CMP_NGT_US 0x0A /* Not-greater-than (unordered, signaling) */
273 #define _CMP_FALSE_OQ 0x0B /* False (ordered, nonsignaling) */
274 #define _CMP_NEQ_OQ 0x0C /* Not-equal (ordered, non-signaling) */
275 #define _CMP_GE_OS 0x0D /* Greater-than-or-equal (ordered, signaling) */
276 #define _CMP_GT_OS 0x0E /* Greater-than (ordered, signaling) */
277 #define _CMP_TRUE_UQ 0x0F /* True (unordered, non-signaling) */
278 #define _CMP_EQ_OS 0x10 /* Equal (ordered, signaling) */
279 #define _CMP_LT_OQ 0x11 /* Less-than (ordered, nonsignaling) */
280 #define _CMP_LE_OQ 0x12 /* Less-than-or-equal (ordered, nonsignaling) */
281 #define _CMP_UNORD_S 0x13 /* Unordered (signaling) */
282 #define _CMP_NEQ_US 0x14 /* Not-equal (unordered, signaling) */
283 #define _CMP_NLT_UQ 0x15 /* Not-less-than (unordered, nonsignaling) */
284 #define _CMP_NLE_UQ 0x16 /* Not-less-than-or-equal (unordered, nonsignaling) */
285 #define _CMP_ORD_S 0x17 /* Ordered (signaling) */
286 #define _CMP_EQ_US 0x18 /* Equal (unordered, signaling) */
287 #define _CMP_NGE_UQ 0x19 /* Not-greater-than-or-equal (unordered, nonsignaling) */
288 #define _CMP_NGT_UQ 0x1A /* Not-greater-than (unordered, nonsignaling) */
289 #define _CMP_FALSE_OS 0x1B /* False (ordered, signaling) */
290 #define _CMP_NEQ_OS 0x1C /* Not-equal (ordered, signaling) */
291 #define _CMP_GE_OQ 0x1D /* Greater-than-or-equal (ordered, nonsignaling) */
292 #define _CMP_GT_OQ 0x1E /* Greater-than (ordered, nonsignaling) */
293 #define _CMP_TRUE_US 0x1F /* True (unordered, signaling) */
294 
295 __EMU_M256_IMPL_M2( __m256d, add_pd );
296 __EMU_M256_IMPL_M2( __m256, add_ps );
297 
298 __EMU_M256_IMPL_M2( __m256d, addsub_pd );
299 __EMU_M256_IMPL_M2( __m256, addsub_ps );
300 
301 __EMU_M256_IMPL_M2( __m256d, and_pd );
302 __EMU_M256_IMPL_M2( __m256, and_ps );
303 
304 __EMU_M256_IMPL_M2( __m256d, andnot_pd );
305 __EMU_M256_IMPL_M2( __m256, andnot_ps );
306 
307 __EMU_M256_IMPL_M2( __m256d, div_pd );
308 __EMU_M256_IMPL_M2( __m256, div_ps );
309 
310 __EMU_M256_IMPL_M2( __m256d, hadd_pd );
311 __EMU_M256_IMPL_M2( __m256, hadd_ps );
312 
313 __EMU_M256_IMPL_M2( __m256d, hsub_pd );
314 __EMU_M256_IMPL_M2( __m256, hsub_ps );
315 
316 __EMU_M256_IMPL_M2( __m256d, max_pd );
317 __EMU_M256_IMPL_M2( __m256, max_ps );
318 
319 __EMU_M256_IMPL_M2( __m256d, min_pd );
320 __EMU_M256_IMPL_M2( __m256, min_ps );
321 
322 __EMU_M256_IMPL_M2( __m256d, mul_pd );
323 __EMU_M256_IMPL_M2( __m256, mul_ps );
324 
325 __EMU_M256_IMPL_M2( __m256d, or_pd );
326 __EMU_M256_IMPL_M2( __m256, or_ps );
327 
328 __EMU_M256_IMPL_M2I_SHIFT( __m256d, shuffle_pd, 2 );
329 __EMU_M256_IMPL_M2I_DUP( __m256, shuffle_ps );
330 
331 __EMU_M256_IMPL_M2( __m256d, sub_pd );
332 __EMU_M256_IMPL_M2( __m256, sub_ps );
333 
334 __EMU_M256_IMPL_M2( __m256d, xor_pd );
335 __EMU_M256_IMPL_M2( __m256, xor_ps );
336 
337 #if defined (__SSE4_2__) || defined (__SSE4_1__)
338 
339 __EMU_M256_IMPL_M2I_SHIFT( __m256d, blend_pd, 2 );
340 __EMU_M256_IMPL_M2I_SHIFT( __m256, blend_ps, 4 );
341 
342 __EMU_M256_IMPL_M3( __m256d, blendv_pd );
343 __EMU_M256_IMPL_M3( __m256, blendv_ps );
344 
345 __EMU_M256_IMPL_M2I_DUP( __m256, dp_ps );
346 
347 __EMU_M256_IMPL_M1I_DUP( __m256d, round_pd );
348 #define _mm256_ceil_pd(val) _mm256_round_pd((val), 0x0A);
349 #define _mm256_floor_pd(val) _mm256_round_pd((val), 0x09);
350 
351 __EMU_M256_IMPL_M1I_DUP( __m256, round_ps );
352 #define _mm256_ceil_ps(val) _mm256_round_ps((val), 0x0A);
353 #define _mm256_floor_ps(val) _mm256_round_ps((val), 0x09);
354 
355 #define __emu_mm_test_impl( op, sfx, vec_type ) \
356 static __emu_inline int __emu_mm_test##op##_##sfx(vec_type s1, vec_type s2) { \
357  __m128d sign_bits_pd = _mm_castsi128_pd( _mm_set_epi32( 1 << 31, 0, 1 << 31, 0 ) ); \
358  __m128 sign_bits_ps = _mm_castsi128_ps( _mm_set1_epi32( 1 << 31 ) ); \
359  \
360  s1 = _mm_and_##sfx( s1, sign_bits_##sfx ); \
361  s2 = _mm_and_##sfx( s2, sign_bits_##sfx ); \
362  return _mm_test##op##_si128( _mm_cast##sfx##_si128( s1 ), _mm_cast##sfx##_si128( s2 ) ); \
363 }
364 
365 __emu_mm_test_impl( z, pd, __m128d );
366 __emu_mm_test_impl( c, pd, __m128d );
367 __emu_mm_test_impl( nzc, pd, __m128d );
368 
369 __emu_mm_test_impl( z, ps, __m128 );
370 __emu_mm_test_impl( c, ps, __m128 );
371 __emu_mm_test_impl( nzc, ps, __m128 );
372 
373 
374 
375 #define __emu_mm256_test_impl( prfx, op, sfx, sfx_impl, vec_type ) \
376 static __emu_inline int __emu_mm256_test##op##_##sfx(vec_type s1, vec_type s2) { \
377  int ret1 = prfx##_test##op##_##sfx_impl( s1.__emu_m128[0], s2.__emu_m128[0] ); \
378  int ret2 = prfx##_test##op##_##sfx_impl( s1.__emu_m128[1], s2.__emu_m128[1] ); \
379  return ( ret1 && ret2 ); \
380 };
381 
382 __emu_mm256_test_impl( _mm, z, si256, si128, __emu__m256i );
383 __emu_mm256_test_impl( _mm, c, si256, si128, __emu__m256i );
384 __emu_mm256_test_impl( _mm, nzc, si256, si128, __emu__m256i );
385 
386 __emu_mm256_test_impl( __emu_mm, z, pd, pd, __emu__m256d );
387 __emu_mm256_test_impl( __emu_mm, c, pd, pd, __emu__m256d );
388 __emu_mm256_test_impl( __emu_mm, nzc, pd, pd, __emu__m256d );
389 
390 __emu_mm256_test_impl( __emu_mm, z, ps, ps, __emu__m256 );
391 __emu_mm256_test_impl( __emu_mm, c, ps, ps, __emu__m256 );
392 __emu_mm256_test_impl( __emu_mm, nzc, ps, ps, __emu__m256 );
393 
394 #endif
395 
396 #if defined( __GNUC__ ) && ( __GNUC__ == 4 ) && (__GNUC_MINOR__ < 4 )
397 /* use macro implementation instead of inline functions to allow -O0 for GCC pre 4.4 */
398 
399 #pragma message ("Using macro for GCC <4.4" )
400 
401 #define __emu_mm_cmp_ps(m1, m2, predicate) \
402 ({ \
403  __m128 res_ = (m1), m2_ = (m2); \
404  if ( 7 < (unsigned)predicate ) __asm__ __volatile__ ( "ud2" : : : "memory" ); \
405  __asm__ ( "cmpps %[pred_], %[m2_], %[res_]" : [res_] "+x" (res_) : [m2_] "xm" (m2_), [pred_] "i" (predicate) ); \
406  res_; })
407 
408 #define __emu_mm256_cmp_ps(m1, m2, predicate) \
409 ({ \
410  __emu__m256 res_ = (m1), m2_ = (m2); \
411  if ( 7 < (unsigned)predicate ) __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */ \
412  __asm__ ( "cmpps %[pred_], %[m2_], %[res_]" : [res_] "+x" (res_.__emu_m128[0]) : [m2_] "xm" (m2_.__emu_m128[0]), [pred_] "i" (predicate) ); \
413  __asm__ ( "cmpps %[pred_], %[m2_], %[res_]" : [res_] "+x" (res_.__emu_m128[1]) : [m2_] "xm" (m2_.__emu_m128[1]), [pred_] "i" (predicate) ); \
414  res_; })
415 
416 
417 #define __emu_mm_cmp_pd(m1, m2, predicate) \
418 ({ \
419  __m128 res_ = (m1), m2_ = (m2); \
420  if ( 7 < (unsigned)predicate ) __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */ \
421  __asm__ ( "cmppd %[pred_], %[m2_], %[res_]" : [res_] "+x" (res_) : [m2_] "xm" (m2_), [pred_] "i" (predicate) ); \
422  res_; })
423 
424 #define __emu_mm256_cmp_pd(m1, m2, predicate) \
425 ({ \
426  __emu__m256 res_ = (m1), m2_ = (m2); \
427  if ( 7 < (unsigned)predicate ) __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */ \
428  __asm__ ( "cmppd %[pred_], %[m2_], %[res_]" : [res_] "+x" (res_.__emu_m128[0]) : [m2_] "xm" (m2_.__emu_m128[0]), [pred_] "i" (predicate) ); \
429  __asm__ ( "cmppd %[pred_], %[m2_], %[res_]" : [res_] "+x" (res_.__emu_m128[1]) : [m2_] "xm" (m2_.__emu_m128[1]), [pred_] "i" (predicate) ); \
430  res_; })
431 
432 
433 #define __emu_mm_cmp_ss(m1, m2, predicate) \
434 ({ \
435  __m128 res_ = (m1), m2_ = (m2); \
436  if ( 7 < (unsigned)predicate ) __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */ \
437  __asm__ ( "cmpss %[pred_], %[m2_], %[res_]" : [res_] "+x" (res_) : [m2_] "xm" (m2_), [pred_] "i" (predicate) ); \
438  res_; })
439 
440 #define __emu_mm_cmp_sd(m1, m2, predicate) \
441 ({ \
442  __m128 res_ = (m1), m2_ = (m2); \
443  if ( 7 < (unsigned)predicate ) __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */ \
444  __asm__ ( "cmpsd %[pred_], %[m2_], %[res_]" : [res_] "+x" (res_) : [m2_] "xm" (m2_), [pred_] "i" (predicate) ); \
445  res_; })
446 
447 
448 
449 #else /* __GNUC__==4 && __GNUC_MINOR__ <4 */
450 
451 
452 static __emu_inline __m128 __emu_mm_cmp_ps(__m128 m1, __m128 m2, const int predicate)
453 {
454  __m128 res;
455 
456  if ( predicate >= 0 && predicate <= 7 ) {
457  res = m1;
458  __asm__ ( "cmpps %[pred_], %[m2_], %[res_]" : [res_] "+x" (res) : [m2_] "xm" (m2), [pred_] "i" (predicate) );
459  } else {
460  __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */
461  }
462 
463  return ( res );
464 }
465 __EMU_M256_IMPL2_M2I_DUP( __m256, cmp_ps )
466 
467 static __emu_inline __m128d __emu_mm_cmp_pd(__m128d m1, __m128d m2, const int predicate)
468 {
469  __m128d res;
470 
471  if ( predicate >= 0 && predicate <= 7 ) {
472  res = m1;
473  __asm__ ( "cmppd %[pred_], %[m2_], %[res_]" : [res_] "+x" (res) : [m2_] "xm" (m2), [pred_] "i" (predicate) );
474  } else {
475  __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */
476  }
477 
478  return ( res );
479 }
480 __EMU_M256_IMPL2_M2I_DUP( __m256d, cmp_pd )
481 
482 
483 static __emu_inline __m128d __emu_mm_cmp_sd(__m128d m1, __m128d m2, const int predicate)
484 {
485  __m128d res;
486 
487  if ( predicate >= 0 && predicate <= 7 ) {
488  res = m1;
489  __asm__ ( "cmpsd %[pred_], %[m2_], %[res_]" : [res_] "+x" (res) : [m2_] "xm" (m2), [pred_] "i" (predicate) );
490  } else {
491  __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */
492  }
493 
494  return ( res );
495 }
496 
497 static __emu_inline __m128 __emu_mm_cmp_ss(__m128 m1, __m128 m2, const int predicate)
498 {
499  __m128 res;
500 
501  if ( predicate >= 0 && predicate <= 7 ) {
502  res = m1;
503  __asm__ ( "cmpss %[pred_], %[m2_], %[res_]" : [res_] "+x" (res) : [m2_] "xm" (m2), [pred_] "i" (predicate) );
504  } else {
505  __asm__ __volatile__ ( "ud2" : : : "memory" ); /* not supported yet */
506  }
507 
508  return ( res );
509 }
510 
511 #endif
512 
513 
514 __EMU_M256_IMPL_M1_LH( __m256d, __m128i, cvtepi32_pd );
515 __EMU_M256_IMPL_M1_RET( __m256, __m256i, cvtepi32_ps );
516 __EMU_M256_IMPL_M1_HL( __m128, __m256d, cvtpd_ps );
517 __EMU_M256_IMPL_M1_RET( __m256i, __m256, cvtps_epi32 );
518 __EMU_M256_IMPL_M1_LH( __m256d, __m128, cvtps_pd );
519 __EMU_M256_IMPL_M1_HL( __m128i, __m256d, cvttpd_epi32);
520 __EMU_M256_IMPL_M1_HL( __m128i, __m256d, cvtpd_epi32);
521 __EMU_M256_IMPL_M1_RET( __m256i, __m256, cvttps_epi32 );
522 
523 static __emu_inline __m128 __emu_mm256_extractf128_ps(__emu__m256 m1, const int offset) { return m1.__emu_m128[ offset ]; }
524 static __emu_inline __m128d __emu_mm256_extractf128_pd(__emu__m256d m1, const int offset) { return m1.__emu_m128[ offset ]; }
525 static __emu_inline __m128i __emu_mm256_extractf128_si256(__emu__m256i m1, const int offset) { return m1.__emu_m128[ offset ]; }
526 
527 static __emu_inline void __emu_mm256_zeroall(void) {}
528 static __emu_inline void __emu_mm256_zeroupper(void) {}
529 
530 static __emu_inline __m128 __emu_mm_permutevar_ps(__m128 a, __m128i control)
531 {
532  int const* sel = (int const*)&control;
533  float const* src = (float const*)&a;
534  __EMU_M256_ALIGN(16) float dest[4];
535  int i=0;
536 
537  for (; i<4; ++i)
538  dest[i] = src[ 3 & sel[i] ];
539 
540  return ( *(__m128*)dest );
541 }
542 __EMU_M256_IMPL2_M2T( __m256, __m256i, permutevar_ps );
543 
544 static __emu_inline __m128 __emu_mm_permute_ps(__m128 a, int control) { return _mm_castsi128_ps( _mm_shuffle_epi32( *(__m128i*)&a, control ) ); }
545 __EMU_M256_IMPL2_M1I_DUP( __m256, permute_ps );
546 
547 
548 static __emu_inline __m128d __emu_mm_permutevar_pd(__m128d a, __m128i control)
549 {
550  __emu_int64_t const* sel = (__emu_int64_t const*)&control;
551  double const* src = (double const*)&a;
552  __EMU_M256_ALIGN(16) double dest[2];
553  int i=0;
554 
555  for (; i<2; ++i)
556  dest[i] = src[ (2 & sel[i]) >> 1 ];
557 
558  return ( *(__m128d*)dest );
559 }
560 __EMU_M256_IMPL2_M2T( __m256d, __m256i, permutevar_pd );
561 
562 static __emu_inline __m128d __emu_mm_permute_pd(__m128d a, int control)
563 {
564  double const* src = (double const*)&a;
565  __EMU_M256_ALIGN(16) double dest[2];
566  int i=0;
567 
568  for (; i<2; ++i)
569  dest[i] = src[ 1 & (control >> i) ];
570 
571  return ( *(__m128d*)dest );
572 }
573 __EMU_M256_IMPL2_M1I_SHIFT( __m256d, permute_pd, 2 );
574 
575 
576 #define __emu_mm256_permute2f128_impl( name, m128_type, m256_type ) \
577 static __emu_inline m256_type name( m256_type m1, m256_type m2, int control) { \
578  m256_type res; \
579  __m128 zero = _mm_setzero_ps(); \
580  const m128_type param[4] = { m1.__emu_m128[0], m1.__emu_m128[1], m2.__emu_m128[0], m2.__emu_m128[1] }; \
581  res.__emu_m128[0] = (control & 8) ? *(m128_type*)&zero : param[ control & 0x3 ]; control >>= 4; \
582  res.__emu_m128[1] = (control & 8) ? *(m128_type*)&zero : param[ control & 0x3 ]; \
583  return ( res ); \
584 }
585 
586 __emu_mm256_permute2f128_impl( __emu_mm256_permute2f128_ps, __m128, __emu__m256 );
587 __emu_mm256_permute2f128_impl( __emu_mm256_permute2f128_pd, __m128d, __emu__m256d );
588 __emu_mm256_permute2f128_impl( __emu_mm256_permute2f128_si256, __m128i, __emu__m256i );
589 
590 
591 #define __emu_mm_broadcast_impl( name, res_type, type ) \
592 static __emu_inline res_type name(type const *a) { \
593  const size_t size = sizeof( res_type ) / sizeof( type );\
594  __EMU_M256_ALIGN(32) type res[ size ]; \
595  size_t i = 0; \
596  for ( ; i < size; ++i ) \
597  res[ i ] = *a; \
598  return (*(res_type*)&res); \
599 }
600 
601 __emu_mm_broadcast_impl( __emu_mm_broadcast_ss, __m128, float )
602 __emu_mm_broadcast_impl( __emu_mm256_broadcast_ss, __emu__m256, float )
603 
604 __emu_mm_broadcast_impl( __emu_mm_broadcast_sd, __m128, double )
605 __emu_mm_broadcast_impl( __emu_mm256_broadcast_sd, __emu__m256d, double )
606 
607 __emu_mm_broadcast_impl( __emu_mm256_broadcast_ps, __emu__m256, __m128 )
608 __emu_mm_broadcast_impl( __emu_mm256_broadcast_pd, __emu__m256d, __m128d )
609 
610 
611 static __emu_inline __emu__m256 __emu_mm256_insertf128_ps(__emu__m256 a, __m128 b, int offset) { a.__emu_m128[ offset ] = b; return a; }
612 static __emu_inline __emu__m256d __emu_mm256_insertf128_pd(__emu__m256d a, __m128d b, int offset) { a.__emu_m128[ offset ] = b; return a; }
613 static __emu_inline __emu__m256i __emu_mm256_insertf128_si256(__emu__m256i a, __m128i b, int offset) { a.__emu_m128[ offset ] = b; return a; }
614 
615 
616 #define __emu_mm_load_impl( name, sfx, m256_sfx, m256_type, type_128, type ) \
617 static __emu_inline __emu##m256_type __emu_mm256_##name##_##m256_sfx(const type* a) { \
618  __emu##m256_type res; \
619  res.__emu_m128[0] = _mm_##name##_##sfx( (const type_128 *)a ); \
620  res.__emu_m128[1] = _mm_##name##_##sfx( (const type_128 *)(1+(const __m128 *)a) ); \
621  return (res); \
622 }
623 
624 #define __emu_mm_store_impl( name, sfx, m256_sfx, m256_type, type_128, type ) \
625 static __emu_inline void __emu_mm256_##name##_##m256_sfx(type *a, __emu##m256_type b) { \
626  _mm_##name##_##sfx( (type_128*)a, b.__emu_m128[0] ); \
627  _mm_##name##_##sfx( (type_128*)(1+(__m128*)a), b.__emu_m128[1] ); \
628 }
629 
630 __emu_mm_load_impl( load, pd, pd, __m256d, double, double );
631 __emu_mm_store_impl( store, pd, pd, __m256d, double, double );
632 
633 __emu_mm_load_impl( load, ps, ps, __m256, float, float );
634 __emu_mm_store_impl( store, ps, ps, __m256, float, float );
635 
636 __emu_mm_load_impl( loadu, pd, pd, __m256d, double, double );
637 __emu_mm_store_impl( storeu, pd, pd, __m256d, double, double );
638 
639 __emu_mm_load_impl( loadu, ps, ps, __m256, float, float );
640 __emu_mm_store_impl( storeu, ps, ps, __m256, float, float );
641 
642 __emu_mm_load_impl( load, si128, si256, __m256i, __m128i, __emu__m256i );
643 __emu_mm_store_impl( store, si128, si256, __m256i, __m128i, __emu__m256i );
644 
645 __emu_mm_load_impl( loadu, si128, si256, __m256i, __m128i, __emu__m256i );
646 __emu_mm_store_impl( storeu, si128, si256, __m256i, __m128i, __emu__m256i );
647 
648 
649 #define __emu_maskload_impl( name, vec_type, mask_vec_type, type, mask_type ) \
650 static __emu_inline vec_type name(type const *a, mask_vec_type mask) { \
651  const size_t size_type = sizeof( type ); \
652  const size_t size = sizeof( vec_type ) / size_type; \
653  __EMU_M256_ALIGN(32) type res[ size ]; \
654  const mask_type* p_mask = (const mask_type*)&mask; \
655  size_t i = 0; \
656  mask_type sign_bit = 1; \
657  sign_bit <<= (8*size_type - 1); \
658  for ( ; i < size; ++i ) \
659  res[ i ] = (sign_bit & *(p_mask + i)) ? *(a+i) : 0; \
660  return (*(vec_type*)&res); \
661 }
662 
663 #define __emu_maskstore_impl( name, vec_type, mask_vec_type, type, mask_type ) \
664 static __emu_inline void name(type *a, mask_vec_type mask, vec_type data) { \
665  const size_t size_type = sizeof( type ); \
666  const size_t size = sizeof( vec_type ) / sizeof( type ); \
667  type* p_data = (type*)&data; \
668  const mask_type* p_mask = (const mask_type*)&mask; \
669  size_t i = 0; \
670  mask_type sign_bit = 1; \
671  sign_bit <<= (8*size_type - 1); \
672  for ( ; i < size; ++i ) \
673  if ( *(p_mask + i ) & sign_bit) \
674  *(a + i) = *(p_data + i); \
675 }
676 
677 __emu_maskload_impl( __emu_mm256_maskload_pd, __emu__m256d, __emu__m256i, double, __emu_int64_t );
678 __emu_maskstore_impl( __emu_mm256_maskstore_pd, __emu__m256d, __emu__m256i, double, __emu_int64_t );
679 
680 __emu_maskload_impl( __emu_mm_maskload_pd, __m128d, __m128i, double, __emu_int64_t );
681 __emu_maskstore_impl( __emu_mm_maskstore_pd, __m128d, __m128i, double, __emu_int64_t );
682 
683 __emu_maskload_impl( __emu_mm256_maskload_ps, __emu__m256, __emu__m256i, float, int );
684 __emu_maskstore_impl( __emu_mm256_maskstore_ps, __emu__m256, __emu__m256i, float, int );
685 
686 __emu_maskload_impl( __emu_mm_maskload_ps, __m128, __m128i, float, int );
687 __emu_maskstore_impl( __emu_mm_maskstore_ps, __m128, __m128i, float, int );
688 
689 
690 __EMU_M256_IMPL_M1( __m256, movehdup_ps );
691 __EMU_M256_IMPL_M1( __m256, moveldup_ps );
692 __EMU_M256_IMPL_M1( __m256d, movedup_pd );
693 
694 __emu_mm_load_impl( lddqu, si128, si256, __m256i, __m128i, __emu__m256i );
695 
696 __emu_mm_store_impl( stream, si128, si256, __m256i, __m128i, __emu__m256i );
697 __emu_mm_store_impl( stream, pd, pd, __m256d, double, double );
698 __emu_mm_store_impl( stream, ps, ps, __m256, float, float );
699 
700 
701 __EMU_M256_IMPL_M1( __m256, rcp_ps );
702 __EMU_M256_IMPL_M1( __m256, rsqrt_ps );
703 
704 __EMU_M256_IMPL_M1( __m256d, sqrt_pd );
705 __EMU_M256_IMPL_M1( __m256, sqrt_ps );
706 
707 __EMU_M256_IMPL_M2( __m256d, unpackhi_pd );
708 __EMU_M256_IMPL_M2( __m256, unpackhi_ps );
709 __EMU_M256_IMPL_M2( __m256d, unpacklo_pd );
710 __EMU_M256_IMPL_M2( __m256, unpacklo_ps );
711 
712 
713 static __emu_inline int __emu_mm256_movemask_pd(__emu__m256d a)
714 {
715  return
716  (_mm_movemask_pd( a.__emu_m128[1] ) << 2) |
717  _mm_movemask_pd( a.__emu_m128[0] );
718 }
719 
720 static __emu_inline int __emu_mm256_movemask_ps(__emu__m256 a)
721 {
722  return
723  (_mm_movemask_ps( a.__emu_m128[1] ) << 4) |
724  _mm_movemask_ps( a.__emu_m128[0] );
725 }
726 
727 static __emu_inline __emu__m256d __emu_mm256_setzero_pd(void) { __m128d ret[2] = { _mm_setzero_pd(), _mm_setzero_pd() }; return __emu_set_m128d( ret ); }
728 static __emu_inline __emu__m256 __emu_mm256_setzero_ps(void) { __m128 ret[2] = { _mm_setzero_ps(), _mm_setzero_ps() }; return __emu_set_m128( ret ); }
729 static __emu_inline __emu__m256i __emu_mm256_setzero_si256(void) { __m128i ret[2] = { _mm_setzero_si128(), _mm_setzero_si128() }; return __emu_set_m128i( ret ); }
730 
731 static __emu_inline __emu__m256d __emu_mm256_set_pd(double a1, double a2, double a3, double a4)
732 { __m128d ret[2] = { _mm_set_pd( a3, a4 ), _mm_set_pd( a1, a2 ) }; return __emu_set_m128d( ret ); }
733 
734 static __emu_inline __emu__m256 __emu_mm256_set_ps(float a1, float a2, float a3, float a4, float a5, float a6, float a7, float a8)
735 { __m128 ret[2] = { _mm_set_ps( a5, a6, a7, a8 ), _mm_set_ps( a1, a2, a3, a4 ) }; return __emu_set_m128( ret ); }
736 
737 static __emu_inline __emu__m256i __emu_mm256_set_epi8(char a1, char a2, char a3, char a4, char a5, char a6, char a7, char a8,
738  char a9, char a10, char a11, char a12, char a13, char a14, char a15, char a16,
739  char a17, char a18, char a19, char a20, char a21, char a22, char a23, char a24,
740  char a25, char a26, char a27, char a28, char a29, char a30, char a31, char a32)
741 { __m128i ret[2] = { _mm_set_epi8( a17, a18, a19, a20, a21, a22, a23, a24, a25, a26, a27, a28, a29, a30, a31, a32 ),
742  _mm_set_epi8( a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, a11, a12, a13, a14, a15, a16 ) };
743  return __emu_set_m128i( ret );
744 }
745 
746 static __emu_inline __emu__m256i __emu_mm256_set_epi16(short a1, short a2, short a3, short a4, short a5, short a6, short a7, short a8,
747  short a9, short a10, short a11, short a12, short a13, short a14, short a15, short a16)
748 { __m128i ret[2] = { _mm_set_epi16( a9, a10, a11, a12, a13, a14, a15, a16 ),
749  _mm_set_epi16( a1, a2, a3, a4, a5, a6, a7, a8 ) };
750  return __emu_set_m128i( ret );
751 }
752 
753 static __emu_inline __emu__m256i __emu_mm256_set_epi32(int a1, int a2, int a3, int a4, int a5, int a6, int a7, int a8)
754 { __m128i ret[2] = { _mm_set_epi32( a5, a6, a7, a8 ), _mm_set_epi32( a1, a2, a3, a4 ) }; return __emu_set_m128i( ret ); }
755 
756 static __emu_inline __m128i __emu_mm_set_epi64x( __emu_int64_t a, __emu_int64_t b ) { return _mm_set_epi64( *(__m64*)&a, *(__m64*)&b ); }
757 
758 static __emu_inline __emu__m256i __emu_mm256_set_epi64x(__emu_int64_t a1, __emu_int64_t a2, __emu_int64_t a3, __emu_int64_t a4)
759 { __m128i ret[2] = { __emu_mm_set_epi64x( a3, a4 ), __emu_mm_set_epi64x( a1, a2 ) }; return __emu_set_m128i( ret ); }
760 
761 
762 static __emu_inline __emu__m256d __emu_mm256_setr_pd(double a1, double a2, double a3, double a4)
763 { __m128d ret[2] = { _mm_setr_pd( a1, a2 ), _mm_setr_pd( a3, a4 ) }; return __emu_set_m128d( ret ); }
764 
765 static __emu_inline __emu__m256 __emu_mm256_setr_ps(float a1, float a2, float a3, float a4, float a5, float a6, float a7, float a8)
766 { __m128 ret[2] = { _mm_setr_ps( a1, a2, a3, a4 ), _mm_setr_ps( a5, a6, a7, a8 ) }; return __emu_set_m128( ret ); }
767 
768 static __emu_inline __emu__m256i __emu_mm256_setr_epi8(char a1, char a2, char a3, char a4, char a5, char a6, char a7, char a8,
769  char a9, char a10, char a11, char a12, char a13, char a14, char a15, char a16,
770  char a17, char a18, char a19, char a20, char a21, char a22, char a23, char a24,
771  char a25, char a26, char a27, char a28, char a29, char a30, char a31, char a32)
772 { __m128i ret[2] = { _mm_setr_epi8( a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, a11, a12, a13, a14, a15, a16 ),
773  _mm_setr_epi8( a17, a18, a19, a20, a21, a22, a23, a24, a25, a26, a27, a28, a29, a30, a31, a32 ) };
774  return __emu_set_m128i( ret );
775 }
776 
777 static __emu_inline __emu__m256i __emu_mm256_setr_epi16(short a1, short a2, short a3, short a4, short a5, short a6, short a7, short a8,
778  short a9, short a10, short a11, short a12, short a13, short a14, short a15, short a16)
779 { __m128i ret[2] = { _mm_setr_epi16( a1, a2, a3, a4, a5, a6, a7, a8 ),
780  _mm_setr_epi16( a9, a10, a11, a12, a13, a14, a15, a16 ) }; return __emu_set_m128i( ret );
781 }
782 
783 static __emu_inline __emu__m256i __emu_mm256_setr_epi32(int a1, int a2, int a3, int a4, int a5, int a6, int a7, int a8)
784 { __m128i ret[2] = { _mm_setr_epi32( a1, a2, a3, a4 ), _mm_setr_epi32( a5, a6, a7, a8 ), }; return __emu_set_m128i( ret ); }
785 
786 static __emu_inline __emu__m256i __emu_mm256_setr_epi64x(__emu_int64_t a1, __emu_int64_t a2, __emu_int64_t a3, __emu_int64_t a4)
787 { __m128i ret[2] = { __emu_mm_set_epi64x( a2, a1 ), __emu_mm_set_epi64x( a4, a3 ) }; return __emu_set_m128i( ret ); }
788 
789 
790 
791 __EMU_M256_IMPL_M1P_DUP( __m256d, double, set1_pd );
792 __EMU_M256_IMPL_M1P_DUP( __m256, float, set1_ps );
793 __EMU_M256_IMPL_M1P_DUP( __m256i, char, set1_epi8 );
794 __EMU_M256_IMPL_M1P_DUP( __m256i, short, set1_epi16 );
795 __EMU_M256_IMPL_M1P_DUP( __m256i, int, set1_epi32 );
796 
797 static __emu__m256i __emu_mm256_set1_epi64x(__emu_int64_t a)
798 {
799  __emu_int64_t res[4] = { a, a, a, a };
800  return *((__emu__m256i*)res);
801 }
802 
803 /*
804  * Support intrinsics to do vector type casts. These intrinsics do not introduce
805  * extra moves to generated code. When cast is done from a 128 to 256-bit type
806  * the low 128 bits of the 256-bit result contain source parameter value; the
807  * upper 128 bits of the result are undefined
808  */
809 __EMU_M256_IMPL_M1_RET( __m256, __m256d, castpd_ps );
810 __EMU_M256_IMPL_M1_RET( __m256d, __m256, castps_pd );
811 
812 __EMU_M256_IMPL_M1_RET_NAME( __m256i, __m256, castps_si128, castps_si256 );
813 __EMU_M256_IMPL_M1_RET_NAME( __m256i, __m256d, castpd_si128, castpd_si256 );
814 
815 __EMU_M256_IMPL_M1_RET_NAME( __m256, __m256i, castsi128_ps, castsi256_ps );
816 __EMU_M256_IMPL_M1_RET_NAME( __m256d, __m256i, castsi128_pd, castsi256_pd );
817 
818 static __emu_inline __m128 __emu_mm256_castps256_ps128(__emu__m256 a) { return ( a.__emu_m128[0] ); }
819 static __emu_inline __m128d __emu_mm256_castpd256_pd128(__emu__m256d a) { return ( a.__emu_m128[0] ); }
820 static __emu_inline __m128i __emu_mm256_castsi256_si128(__emu__m256i a) { return ( a.__emu_m128[0] ); }
821 
822 static __emu_inline __emu__m256 __emu_mm256_castps128_ps256(__m128 a) { __m128 ret[2] = { a, _mm_setzero_ps() }; return __emu_set_m128( ret ); };
823 static __emu_inline __emu__m256d __emu_mm256_castpd128_pd256(__m128d a) { __m128d ret[2] = { a, _mm_setzero_pd() }; return __emu_set_m128d( ret ); };
824 static __emu_inline __emu__m256i __emu_mm256_castsi128_si256(__m128i a) { __m128i ret[2] = { a, _mm_setzero_si128() }; return __emu_set_m128i( ret ); };
825 
826 #if defined __cplusplus
827 }; /* End "C" */
828 #endif /* __cplusplus */
829 
830 
831 
832 
833 
834 
835 #ifndef __EMU_M256_NOMAP
836 
837 #define __m256 __emu__m256
838 #define __m256i __emu__m256i
839 #define __m256d __emu__m256d
840 
841 #define _mm256_add_pd __emu_mm256_add_pd
842 #define _mm256_add_ps __emu_mm256_add_ps
843 
844 #define _mm256_addsub_pd __emu_mm256_addsub_pd
845 #define _mm256_addsub_ps __emu_mm256_addsub_ps
846 
847 #define _mm256_and_pd __emu_mm256_and_pd
848 #define _mm256_and_ps __emu_mm256_and_ps
849 
850 #define _mm256_andnot_pd __emu_mm256_andnot_pd
851 #define _mm256_andnot_ps __emu_mm256_andnot_ps
852 
853 #define _mm256_blend_pd __emu_mm256_blend_pd
854 #define _mm256_blend_ps __emu_mm256_blend_ps
855 
856 #define _mm256_blendv_pd __emu_mm256_blendv_pd
857 #define _mm256_blendv_ps __emu_mm256_blendv_ps
858 
859 #define _mm256_div_pd __emu_mm256_div_pd
860 #define _mm256_div_ps __emu_mm256_div_ps
861 
862 #define _mm256_dp_ps __emu_mm256_dp_ps
863 
864 #define _mm256_hadd_pd __emu_mm256_hadd_pd
865 #define _mm256_hadd_ps __emu_mm256_hadd_ps
866 
867 #define _mm256_hsub_pd __emu_mm256_hsub_pd
868 #define _mm256_hsub_ps __emu_mm256_hsub_ps
869 
870 #define _mm256_max_pd __emu_mm256_max_pd
871 #define _mm256_max_ps __emu_mm256_max_ps
872 
873 #define _mm256_min_pd __emu_mm256_min_pd
874 #define _mm256_min_ps __emu_mm256_min_ps
875 
876 #define _mm256_mul_pd __emu_mm256_mul_pd
877 #define _mm256_mul_ps __emu_mm256_mul_ps
878 
879 #define _mm256_or_pd __emu_mm256_or_pd
880 #define _mm256_or_ps __emu_mm256_or_ps
881 
882 #define _mm256_shuffle_pd __emu_mm256_shuffle_pd
883 #define _mm256_shuffle_ps __emu_mm256_shuffle_ps
884 
885 #define _mm256_sub_pd __emu_mm256_sub_pd
886 #define _mm256_sub_ps __emu_mm256_sub_ps
887 
888 #define _mm256_xor_pd __emu_mm256_xor_pd
889 #define _mm256_xor_ps __emu_mm256_xor_ps
890 
891 
892 #define _mm_cmp_pd __emu_mm_cmp_pd
893 #define _mm256_cmp_pd __emu_mm256_cmp_pd
894 
895 #define _mm_cmp_ps __emu_mm_cmp_ps
896 #define _mm256_cmp_ps __emu_mm256_cmp_ps
897 
898 #define _mm_cmp_sd __emu_mm_cmp_sd
899 #define _mm_cmp_ss __emu_mm_cmp_ss
900 
901 #define _mm256_cvtepi32_pd __emu_mm256_cvtepi32_pd
902 #define _mm256_cvtepi32_ps __emu_mm256_cvtepi32_ps
903 
904 #define _mm256_cvtpd_ps __emu_mm256_cvtpd_ps
905 #define _mm256_cvtps_epi32 __emu_mm256_cvtps_epi32
906 #define _mm256_cvtps_pd __emu_mm256_cvtps_pd
907 
908 #define _mm256_cvttpd_epi32 __emu_mm256_cvttpd_epi32
909 #define _mm256_cvtpd_epi32 __emu_mm256_cvtpd_epi32
910 #define _mm256_cvttps_epi32 __emu_mm256_cvttps_epi32
911 
912 #define _mm256_extractf128_ps __emu_mm256_extractf128_ps
913 #define _mm256_extractf128_pd __emu_mm256_extractf128_pd
914 #define _mm256_extractf128_si256 __emu_mm256_extractf128_si256
915 
916 #define _mm256_zeroall __emu_mm256_zeroall
917 #define _mm256_zeroupper __emu_mm256_zeroupper
918 
919 #define _mm256_permutevar_ps __emu_mm256_permutevar_ps
920 #define _mm_permutevar_ps __emu_mm_permutevar_ps
921 
922 #define _mm256_permute_ps __emu_mm256_permute_ps
923 #define _mm_permute_ps __emu_mm_permute_ps
924 
925 #define _mm256_permutevar_pd __emu_mm256_permutevar_pd
926 #define _mm_permutevar_pd __emu_mm_permutevar_pd
927 
928 #define _mm256_permute_pd __emu_mm256_permute_pd
929 #define _mm_permute_pd __emu_mm_permute_pd
930 
931 #define _mm256_permute2f128_ps __emu_mm256_permute2f128_ps
932 #define _mm256_permute2f128_pd __emu_mm256_permute2f128_pd
933 #define _mm256_permute2f128_si256 __emu_mm256_permute2f128_si256
934 
935 #define _mm256_broadcast_ss __emu_mm256_broadcast_ss
936 #define _mm_broadcast_ss __emu_mm_broadcast_ss
937 
938 #define _mm256_broadcast_sd __emu_mm256_broadcast_sd
939 
940 #define _mm256_broadcast_ps __emu_mm256_broadcast_ps
941 #define _mm256_broadcast_pd __emu_mm256_broadcast_pd
942 
943 #define _mm256_insertf128_ps __emu_mm256_insertf128_ps
944 #define _mm256_insertf128_pd __emu_mm256_insertf128_pd
945 #define _mm256_insertf128_si256 __emu_mm256_insertf128_si256
946 
947 #define _mm256_load_pd __emu_mm256_load_pd
948 #define _mm256_store_pd __emu_mm256_store_pd
949 #define _mm256_load_ps __emu_mm256_load_ps
950 #define _mm256_store_ps __emu_mm256_store_ps
951 
952 #define _mm256_loadu_pd __emu_mm256_loadu_pd
953 #define _mm256_storeu_pd __emu_mm256_storeu_pd
954 #define _mm256_loadu_ps __emu_mm256_loadu_ps
955 #define _mm256_storeu_ps __emu_mm256_storeu_ps
956 
957 #define _mm256_load_si256 __emu_mm256_load_si256
958 #define _mm256_store_si256 __emu_mm256_store_si256
959 #define _mm256_loadu_si256 __emu_mm256_loadu_si256
960 #define _mm256_storeu_si256 __emu_mm256_storeu_si256
961 
962 #define _mm256_maskload_pd __emu_mm256_maskload_pd
963 #define _mm256_maskstore_pd __emu_mm256_maskstore_pd
964 #define _mm_maskload_pd __emu_mm_maskload_pd
965 #define _mm_maskstore_pd __emu_mm_maskstore_pd
966 
967 #define _mm256_maskload_ps __emu_mm256_maskload_ps
968 #define _mm256_maskstore_ps __emu_mm256_maskstore_ps
969 #define _mm_maskload_ps __emu_mm_maskload_ps
970 #define _mm_maskstore_ps __emu_mm_maskstore_ps
971 
972 #define _mm256_movehdup_ps __emu_mm256_movehdup_ps
973 #define _mm256_moveldup_ps __emu_mm256_moveldup_ps
974 
975 #define _mm256_movedup_pd __emu_mm256_movedup_pd
976 #define _mm256_lddqu_si256 __emu_mm256_lddqu_si256
977 
978 #define _mm256_stream_si256 __emu_mm256_stream_si256
979 #define _mm256_stream_pd __emu_mm256_stream_pd
980 #define _mm256_stream_ps __emu_mm256_stream_ps
981 
982 #define _mm256_rcp_ps __emu_mm256_rcp_ps
983 #define _mm256_rsqrt_ps __emu_mm256_rsqrt_ps
984 
985 #define _mm256_sqrt_pd __emu_mm256_sqrt_pd
986 #define _mm256_sqrt_ps __emu_mm256_sqrt_ps
987 
988 #define _mm256_round_pd __emu_mm256_round_pd
989 
990 #define _mm256_round_ps __emu_mm256_round_ps
991 
992 #define _mm256_unpackhi_pd __emu_mm256_unpackhi_pd
993 #define _mm256_unpackhi_ps __emu_mm256_unpackhi_ps
994 
995 #define _mm256_unpacklo_pd __emu_mm256_unpacklo_pd
996 #define _mm256_unpacklo_ps __emu_mm256_unpacklo_ps
997 
998 #define _mm256_testz_si256 __emu_mm256_testz_si256
999 #define _mm256_testc_si256 __emu_mm256_testc_si256
1000 #define _mm256_testnzc_si256 __emu_mm256_testnzc_si256
1001 
1002 #define _mm256_testz_pd __emu_mm256_testz_pd
1003 #define _mm256_testc_pd __emu_mm256_testc_pd
1004 #define _mm256_testnzc_pd __emu_mm256_testnzc_pd
1005 #define _mm_testz_pd __emu_mm_testz_pd
1006 #define _mm_testc_pd __emu_mm_testc_pd
1007 #define _mm_testnzc_pd __emu_mm_testnzc_pd
1008 
1009 #define _mm256_testz_ps __emu_mm256_testz_ps
1010 #define _mm256_testc_ps __emu_mm256_testc_ps
1011 #define _mm256_testnzc_ps __emu_mm256_testnzc_ps
1012 #define _mm_testz_ps __emu_mm_testz_ps
1013 #define _mm_testc_ps __emu_mm_testc_ps
1014 #define _mm_testnzc_ps __emu_mm_testnzc_ps
1015 
1016 #define _mm256_movemask_pd __emu_mm256_movemask_pd
1017 #define _mm256_movemask_ps __emu_mm256_movemask_ps
1018 
1019 #define _mm256_setzero_pd __emu_mm256_setzero_pd
1020 #define _mm256_setzero_ps __emu_mm256_setzero_ps
1021 #define _mm256_setzero_si256 __emu_mm256_setzero_si256
1022 
1023 #define _mm256_set_pd __emu_mm256_set_pd
1024 #define _mm256_set_ps __emu_mm256_set_ps
1025 #define _mm256_set_epi8 __emu_mm256_set_epi8
1026 #define _mm256_set_epi16 __emu_mm256_set_epi16
1027 #define _mm256_set_epi32 __emu_mm256_set_epi32
1028 #define _mm256_set_epi64x __emu_mm256_set_epi64x
1029 
1030 #define _mm256_setr_pd __emu_mm256_setr_pd
1031 #define _mm256_setr_ps __emu_mm256_setr_ps
1032 #define _mm256_setr_epi8 __emu_mm256_setr_epi8
1033 #define _mm256_setr_epi16 __emu_mm256_setr_epi16
1034 #define _mm256_setr_epi32 __emu_mm256_setr_epi32
1035 #define _mm256_setr_epi64x __emu_mm256_setr_epi64x
1036 
1037 #define _mm256_set1_pd __emu_mm256_set1_pd
1038 #define _mm256_set1_ps __emu_mm256_set1_ps
1039 #define _mm256_set1_epi8 __emu_mm256_set1_epi8
1040 #define _mm256_set1_epi16 __emu_mm256_set1_epi16
1041 #define _mm256_set1_epi32 __emu_mm256_set1_epi32
1042 #define _mm256_set1_epi64x __emu_mm256_set1_epi64x
1043 
1044 #define _mm256_castpd_ps __emu_mm256_castpd_ps
1045 #define _mm256_castps_pd __emu_mm256_castps_pd
1046 #define _mm256_castps_si256 __emu_mm256_castps_si256
1047 #define _mm256_castpd_si256 __emu_mm256_castpd_si256
1048 #define _mm256_castsi256_ps __emu_mm256_castsi256_ps
1049 #define _mm256_castsi256_pd __emu_mm256_castsi256_pd
1050 #define _mm256_castps256_ps128 __emu_mm256_castps256_ps128
1051 #define _mm256_castpd256_pd128 __emu_mm256_castpd256_pd128
1052 #define _mm256_castsi256_si128 __emu_mm256_castsi256_si128
1053 #define _mm256_castps128_ps256 __emu_mm256_castps128_ps256
1054 #define _mm256_castpd128_pd256 __emu_mm256_castpd128_pd256
1055 #define _mm256_castsi128_si256 __emu_mm256_castsi128_si256
1056 
1057 #endif /* __EMU_M256_NOMAP */
1058 
1059 
1060 
1061 #endif /* __EMU_M256_AVXIMMINTRIN_EMU_H__ */
__emu_mm256_castpd128_pd256
static __emu_inline __emu__m256d __emu_mm256_castpd128_pd256(__m128d a)
Definition: avxintrin_emu.h:823
__emu_mm256_setzero_ps
static __emu_inline __emu__m256 __emu_mm256_setzero_ps(void)
Definition: avxintrin_emu.h:728
__emu__m256
__emu__m256
Definition: avxintrin_emu.h:116
__emu_set_m128i
static __emu_inline __emu__m256i __emu_set_m128i(const __m128i arr[])
Definition: avxintrin_emu.h:132
__emu_mm256_setr_pd
static __emu_inline __emu__m256d __emu_mm256_setr_pd(double a1, double a2, double a3, double a4)
Definition: avxintrin_emu.h:762
__emu_mm_cmp_ps
static __emu_inline __m128 __emu_mm_cmp_ps(__m128 m1, __m128 m2, const int predicate)
Definition: avxintrin_emu.h:452
__emu_mm256_set_epi32
static __emu_inline __emu__m256i __emu_mm256_set_epi32(int a1, int a2, int a3, int a4, int a5, int a6, int a7, int a8)
Definition: avxintrin_emu.h:753
__emu_mm256_setzero_si256
static __emu_inline __emu__m256i __emu_mm256_setzero_si256(void)
Definition: avxintrin_emu.h:729
__emu_mm256_extractf128_si256
static __emu_inline __m128i __emu_mm256_extractf128_si256(__emu__m256i m1, const int offset)
Definition: avxintrin_emu.h:525
__emu_mm256_permute2f128_impl
#define __emu_mm256_permute2f128_impl(name, m128_type, m256_type)
Definition: avxintrin_emu.h:576
__emu_mm256_castps256_ps128
static __emu_inline __m128 __emu_mm256_castps256_ps128(__emu__m256 a)
Definition: avxintrin_emu.h:818
__emu_mm_permute_pd
static __emu_inline __m128d __emu_mm_permute_pd(__m128d a, int control)
Definition: avxintrin_emu.h:562
__emu_mm256_insertf128_si256
static __emu_inline __emu__m256i __emu_mm256_insertf128_si256(__emu__m256i a, __m128i b, int offset)
Definition: avxintrin_emu.h:613
__emu_mm256_movemask_ps
static __emu_inline int __emu_mm256_movemask_ps(__emu__m256 a)
Definition: avxintrin_emu.h:720
__emu_mm256_set_epi8
static __emu_inline __emu__m256i __emu_mm256_set_epi8(char a1, char a2, char a3, char a4, char a5, char a6, char a7, char a8, char a9, char a10, char a11, char a12, char a13, char a14, char a15, char a16, char a17, char a18, char a19, char a20, char a21, char a22, char a23, char a24, char a25, char a26, char a27, char a28, char a29, char a30, char a31, char a32)
Definition: avxintrin_emu.h:737
__emu_mm_cmp_pd
static __emu_inline __m128d __emu_mm_cmp_pd(__m128d m1, __m128d m2, const int predicate)
Definition: avxintrin_emu.h:467
__EMU_M256_IMPL_M1_RET
#define __EMU_M256_IMPL_M1_RET(ret_type, type, func)
Definition: avxintrin_emu.h:143
__emu_maskstore_impl
#define __emu_maskstore_impl(name, vec_type, mask_vec_type, type, mask_type)
Definition: avxintrin_emu.h:663
__emu_mm_cmp_ss
static __emu_inline __m128 __emu_mm_cmp_ss(__m128 m1, __m128 m2, const int predicate)
Definition: avxintrin_emu.h:497
__emu_mm_cmp_sd
static __emu_inline __m128d __emu_mm_cmp_sd(__m128d m1, __m128d m2, const int predicate)
Definition: avxintrin_emu.h:483
__emu__m256d
__emu__m256d
Definition: avxintrin_emu.h:122
__m256d
#define __m256d
Definition: avxintrin_emu.h:839
__EMU_M256_IMPL_M2I_SHIFT
#define __EMU_M256_IMPL_M2I_SHIFT(type, func, shift_for_hi)
Definition: avxintrin_emu.h:241
__emu_mm256_zeroall
static __emu_inline void __emu_mm256_zeroall(void)
Definition: avxintrin_emu.h:527
__EMU_M256_IMPL_M1I_DUP
#define __EMU_M256_IMPL_M1I_DUP(type, func)
Definition: avxintrin_emu.h:185
__emu_mm_set_epi64x
static __emu_inline __m128i __emu_mm_set_epi64x(__emu_int64_t a, __emu_int64_t b)
Definition: avxintrin_emu.h:756
__emu_mm256_insertf128_pd
static __emu_inline __emu__m256d __emu_mm256_insertf128_pd(__emu__m256d a, __m128d b, int offset)
Definition: avxintrin_emu.h:612
__emu_mm256_extractf128_ps
static __emu_inline __m128 __emu_mm256_extractf128_ps(__emu__m256 m1, const int offset)
Definition: avxintrin_emu.h:523
__emu_mm256_insertf128_ps
float double static __m128d __emu_inline __emu__m256 __emu_mm256_insertf128_ps(__emu__m256 a, __m128 b, int offset)
Definition: avxintrin_emu.h:611
__emu_mm256_castps128_ps256
static __emu_inline __emu__m256 __emu_mm256_castps128_ps256(__m128 a)
Definition: avxintrin_emu.h:822
__emu_mm_permutevar_ps
static __emu_inline __m128 __emu_mm_permutevar_ps(__m128 a, __m128i control)
Definition: avxintrin_emu.h:530
__emu_mm256_castpd256_pd128
static __emu_inline __m128d __emu_mm256_castpd256_pd128(__emu__m256d a)
Definition: avxintrin_emu.h:819
__EMU_M256_IMPL_M1_LH
#define __EMU_M256_IMPL_M1_LH(type, type_128, func)
Definition: avxintrin_emu.h:159
__emu_maskload_impl
#define __emu_maskload_impl(name, vec_type, mask_vec_type, type, mask_type)
Definition: avxintrin_emu.h:649
__emu_mm256_set_ps
static __emu_inline __emu__m256 __emu_mm256_set_ps(float a1, float a2, float a3, float a4, float a5, float a6, float a7, float a8)
Definition: avxintrin_emu.h:734
__m256
#define __m256
Definition: avxintrin_emu.h:837
__EMU_M256_IMPL2_M1I_SHIFT
#define __EMU_M256_IMPL2_M1I_SHIFT(type, func, shift_for_hi)
Definition: avxintrin_emu.h:201
__emu_mm256_extractf128_pd
static __emu_inline __m128d __emu_mm256_extractf128_pd(__emu__m256d m1, const int offset)
Definition: avxintrin_emu.h:524
ret
bool ret
Definition: stmskip.cc:242
__emu_mm256_setr_epi32
static __emu_inline __emu__m256i __emu_mm256_setr_epi32(int a1, int a2, int a3, int a4, int a5, int a6, int a7, int a8)
Definition: avxintrin_emu.h:783
__emu_mm_permute_ps
static __emu_inline __m128 __emu_mm_permute_ps(__m128 a, int control)
Definition: avxintrin_emu.h:544
__emu_mm256_movemask_pd
static __emu_inline int __emu_mm256_movemask_pd(__emu__m256d a)
Definition: avxintrin_emu.h:713
__EMU_M256_IMPL_M3
#define __EMU_M256_IMPL_M3(type, func)
Definition: avxintrin_emu.h:249
__emu_mm256_setr_ps
static __emu_inline __emu__m256 __emu_mm256_setr_ps(float a1, float a2, float a3, float a4, float a5, float a6, float a7, float a8)
Definition: avxintrin_emu.h:765
__emu_mm256_setr_epi64x
static __emu_inline __emu__m256i __emu_mm256_setr_epi64x(__emu_int64_t a1, __emu_int64_t a2, __emu_int64_t a3, __emu_int64_t a4)
Definition: avxintrin_emu.h:786
__EMU_M256_IMPL2_M1I_DUP
#define __EMU_M256_IMPL2_M1I_DUP(type, func)
Definition: avxintrin_emu.h:193
stream
Definition: stream.c:87
__emu_mm_store_impl
#define __emu_mm_store_impl(name, sfx, m256_sfx, m256_type, type_128, type)
Definition: avxintrin_emu.h:624
__emu_mm256_set_epi16
static __emu_inline __emu__m256i __emu_mm256_set_epi16(short a1, short a2, short a3, short a4, short a5, short a6, short a7, short a8, short a9, short a10, short a11, short a12, short a13, short a14, short a15, short a16)
Definition: avxintrin_emu.h:746
__emu_set_m128d
static __emu_inline __emu__m256d __emu_set_m128d(const __m128d arr[])
Definition: avxintrin_emu.h:131
__emu_mm256_setzero_pd
static __emu_inline __emu__m256d __emu_mm256_setzero_pd(void)
Definition: avxintrin_emu.h:727
__EMU_M256_IMPL_M1_RET_NAME
#define __EMU_M256_IMPL_M1_RET_NAME(ret_type, type, func, name)
Definition: avxintrin_emu.h:151
__emu_mm_load_impl
#define __emu_mm_load_impl(name, sfx, m256_sfx, m256_type, type_128, type)
Definition: avxintrin_emu.h:616
__emu_mm256_setr_epi8
static __emu_inline __emu__m256i __emu_mm256_setr_epi8(char a1, char a2, char a3, char a4, char a5, char a6, char a7, char a8, char a9, char a10, char a11, char a12, char a13, char a14, char a15, char a16, char a17, char a18, char a19, char a20, char a21, char a22, char a23, char a24, char a25, char a26, char a27, char a28, char a29, char a30, char a31, char a32)
Definition: avxintrin_emu.h:768
__EMU_M256_IMPL_M1P_DUP
#define __EMU_M256_IMPL_M1P_DUP(type, type_param, func)
Definition: avxintrin_emu.h:177
__emu__m256i
__emu__m256i
Definition: avxintrin_emu.h:128
__EMU_M256_IMPL_M2
#define __EMU_M256_IMPL_M2(type, func)
Definition: avxintrin_emu.h:209
__emu_mm256_set1_epi64x
static __emu__m256i __emu_mm256_set1_epi64x(__emu_int64_t a)
Definition: avxintrin_emu.h:797
__EMU_M256_IMPL2_M2I_DUP
#define __EMU_M256_IMPL2_M2I_DUP(type, func)
Definition: avxintrin_emu.h:233
__emu_set_m128
static __emu_inline __emu__m256 __emu_set_m128(const __m128 arr[])
Definition: avxintrin_emu.h:130
__emu_mm_permutevar_pd
static __emu_inline __m128d __emu_mm_permutevar_pd(__m128d a, __m128i control)
Definition: avxintrin_emu.h:548
__EMU_M256_IMPL_M1_HL
#define __EMU_M256_IMPL_M1_HL(type_128, type, func)
Definition: avxintrin_emu.h:168
__emu_mm_broadcast_impl
#define __emu_mm_broadcast_impl(name, res_type, type)
Definition: avxintrin_emu.h:591
__EMU_M256_IMPL2_M2T
#define __EMU_M256_IMPL2_M2T(type, type_2, func)
Definition: avxintrin_emu.h:217
__emu_mm256_set_pd
static __emu_inline __emu__m256d __emu_mm256_set_pd(double a1, double a2, double a3, double a4)
Definition: avxintrin_emu.h:731
__EMU_M256_IMPL_M1
#define __EMU_M256_IMPL_M1(type, func)
Definition: avxintrin_emu.h:135
__emu_mm256_zeroupper
static __emu_inline void __emu_mm256_zeroupper(void)
Definition: avxintrin_emu.h:528
__EMU_M256_ALIGN
union __EMU_M256_ALIGN(32) __emu__m256
Definition: avxintrin_emu.h:112
__emu_mm256_castsi128_si256
static __emu_inline __emu__m256i __emu_mm256_castsi128_si256(__m128i a)
Definition: avxintrin_emu.h:824
__EMU_M256_IMPL_M2I_DUP
#define __EMU_M256_IMPL_M2I_DUP(type, func)
Definition: avxintrin_emu.h:225
__m256i
#define __m256i
Definition: avxintrin_emu.h:838
__emu_mm256_castsi256_si128
static __emu_inline __m128i __emu_mm256_castsi256_si128(__emu__m256i a)
Definition: avxintrin_emu.h:820
__emu_mm256_set_epi64x
static __emu_inline __emu__m256i __emu_mm256_set_epi64x(__emu_int64_t a1, __emu_int64_t a2, __emu_int64_t a3, __emu_int64_t a4)
Definition: avxintrin_emu.h:758
__emu_mm256_setr_epi16
static __emu_inline __emu__m256i __emu_mm256_setr_epi16(short a1, short a2, short a3, short a4, short a5, short a6, short a7, short a8, short a9, short a10, short a11, short a12, short a13, short a14, short a15, short a16)
Definition: avxintrin_emu.h:777